Senior Memory Validation Engineering Lead
Listed on 2026-10-12
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Engineering
Validation Engineer
Rambus, a premier chip and silicon IP provider, seeks a Validation Manager for its Memory Interface Chip unit in the US. The role involves leading validation of memory buffer chips, coordinating cross-functional teams, and driving bench validation and lab automation efforts.
Ideal candidates will have extensive DDR4/5 experience, high-speed signaling knowledge, and a track record in developing validation methodologies and project planning. This is a hybrid, full-time position based in the US.
This posting is for the Senior Memory Validation Engineering Lead role at , based in San Jose, CA, United States.
The position is based in San Jose, CA, United States.
This opportunity is part of our work in Engineering.
The advertised compensation is 162..
We aim to respond to suitable candidates as soon as possible.
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