Sr Principal CAD & HPC Workflow

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Micron is seeking a Senior Principal CAD Engineer to help shape the engineering environment that powers Memory product development across DRAM, HBM, NAND, and custom memory programs. In this high-impact technical role, you will partner with Micron’s CAD Software and HPC teams to architect, modernize, and scale the platforms our worldwide design teams rely on every day, from CAD software infrastructure, project setup flows, and quality-gating solutions to engineering automation and compute workload scalability.

You will also define how success is measured. By developing improvement and quality metrics for job management and workflow performance, you will establish customer-facing servicelevels that give design teams clear visibility into the performance of their environment and give engineering leaders a data-driven path to continuous improvement. Along the way, you will help bring next-generation AI and agentic software solutions into Design Automation, working closely with CAD, Design Engineering, HPC, and EDA vendors.

• Serve as a senior engineer partnering with the CAD Software and HPC teams to support global Memory design teams.
• Develop improvement and quality metrics for job management and workflow performance, such as job throughput, turnaround time, and success rates.
• Establish these metrics as customer-facing service levels, with dashboards and reporting that track performance and drive continuous improvement.
• Shape CAD software architecture, web services, Git/Bitbucket repositories, Jenkins automation, CI/CD workflows, project setup infrastructure, and environment modernization initiatives.
• Collaborate with HPC teams on LSF, compute infrastructure, storage systems, and engineering workload scalability.
• Advance PERC/ERC methodology, automated quality gating, and design environment standardization across product lines.
• Contribute to EDA infrastructure strategy and technical engagement with Cadence, Synopsys, Siemens, and other industry vendors.
• Drive AI-enabled engineering productivity, agentic CAD workflows, and internal software solutions supporting Design Automation initiatives.
• Mentor engineers and influence technical direction across CAD, Design Engineering, HPC, and IT organizations.

• Visible impact:
  Your work directly shapes how quickly and reliably Micron’s global design teams bring new memory products to market.
• Technical influence:
  Set architectural and functional direction across CAD, HPC, and AI initiatives through deep technical expertise and cross-team collaboration.
• Leading-edge work:
  Help apply AI and agentic solutions to semiconductor design workflows at scale.

• B.S. in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 15+ years of experience in semiconductor CAD, EDA, engineering infrastructure, or software development.
• 5+ years of engineering management experience leading technical teams.
• Strong hands-on knowledge of design infrastructure, revision control systems, software development, and engineering workflows.
• Experience driving cross-functional initiatives across design, CAD, IT, HPC, and vendor organizations.

• Experience with Perforce, IPLM/Methodics, Jenkins, Git, Bitbucket, and enterprise software platforms.
• Experience supporting LSF, HPC, cloud, storage, and compute infrastructure for semiconductor…