Senior Physical Design Engineer — SoC/Sub-7nm Expert
Listed on 2026-10-16
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Engineering
Hardware Engineer, Electronics Engineer, Engineering Design & Technologists, Test Engineer
eInfochips, an Arrow company, seeks an experienced physical design engineer to drive synthesis, PnR, and timing convergence for ASIC partitions on-site in San Jose, CA. You will work with architects, RTL, and DFT teams to ensure design signoffs and address EM/IR challenges.
Preferred candidates have 7+ years in SoC physical design, deep PD flows, and proficiency with Innovus and Genus. This role emphasizes tight schedules and collaboration with EDA vendors.
This opportunity is for the Senior Physical Design Engineer — SoC/Sub-7nm Expert role at eInfochips (An Arrow Company).
Consider building your career as a Senior Physical Design Engineer — SoC/Sub-7nm Expert at eInfochips (An Arrow Company).
The Senior Physical Design Engineer — SoC/Sub-7nm Expert position in the Engineering field is open for applications.
We have an opening for a Senior Physical Design Engineer — SoC/Sub-7nm Expert in San Jose, CA, United States within Engineering.
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