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Physical Design Engineer II; IC)

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Uncrewed Engineering Jobs
Full Time position
Listed on 2026-10-17
Job specializations:
  • Engineering
    Hardware Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 180000 - 240000 USD Yearly USD 180000.00 240000.00 YEAR
Job Description & How to Apply Below
Job Description:

What candidate will Be Doing:

  • Execute synthesis, PNR, and STA for assigned partitions of ASIC chip adhering to strict schedules and design goals.
  • Work closely with architects, RTL designers, and DFT engineers to resolve implementation and signoff issues across your blocks.
  • Help close EM/IR, drive LEC and physical verification signoff for your partitions in coordination with methodology owners.
  • Partner with the design team to proactively identify and address potential physical design challenges, enabling efficient iteration and convergence.
  • Contribute to the refinement of other implementation and physical design methodologies, encompassing synthesis, place and route (PnR), electromigration and IR (EMIR), power delivery network (PDN), and logical equivalence checking (LEC).
  • Troubleshoot flow issues and collaborate with EDA vendors to resolve them as needed.

What we are looking for:

  • Bachelor’s degree in electrical engineering, Computer Engineering, Computer Science, or a related technical field, or equivalent practical experience.
  • 7+ years of hands-on experience in physical design and implementation, encompassing synthesis, PnR, timing convergence and physical verification.
  • Proficiency in utilizing Electronic Design Automation (EDA) tools such as Innovus, Tempus, and Quantus, as well as a deep understanding of physical design flows and methodologies.
  • 7+ years of experience in physical design roles and related activities.
  • Proven ability to adhere to tight schedules and implement low‑power design techniques.
  • Experience in System-on-Chip (SoC) design and implementation.
  • Expertise in sub‑7nm node technologies.
  • Familiarity with industry‑standard EDA tools and their capabilities.
  • Strong scripting skills in TCL to develop custom flows and methodologies on standard EDA tools from Cadence/Synopsys.

What’s In It for You:

  • At Arrow, we recognize that financial rewards and great benefits are important aspects of an ideal job. That’s why we offer competitive financial compensation, including various compensation plans and a solid benefits package.
  • Medical, Dental, Vision Insurance
  • 401k, With Matching Contributions
  • Short-Term/Long-Term Disability Insurance
  • Health Savings Account (HSA)/Health Reimbursement Account (HRA) Options
  • Paid Time Off (including sick, holiday, vacation, etc.)
  • Tuition Reimbursement
  • Growth Opportunities
  • And more!

Work Arrangement Fully On-Site: Must be able to travel to an Arrow Client office location as requested by Arrow Client leadership.

Location: Complete On-Site at San Jose, California

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