Principal Silicon Validation Engineer – SerDes
Listed on 2026-10-17
-
Engineering
Test Engineer, Validation Engineer
Astera Labs, based in San Jose, CA, seeks a Principal/Senior Principal Post-Silicon Validation Engineer to lead post-silicon validation for its AI/machine-learning connectivity portfolio. You will design experiments, automate tests, and quantify performance margins across conditions.
The role requires 10+ years in SoC/silicon validation for server/storage/networking, strong Python and lab skills, and the ability to lead complex debug efforts with PCIe/Ethernet interfaces.
This is a strong position to take on the Principal Silicon Validation Engineer – Ser Des role at Astera Labs.
The advertised compensation is 180..
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Principal Silicon Validation Engineer – Ser Des role in the description above.
We appreciate your interest in this position.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).