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Sr. Principal Silicon Applications Engineer, AI Infrastructure

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Astera Labs
Full Time position
Listed on 2026-10-17
Job specializations:
  • Engineering
    Systems Engineer, Test Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 180000 - 240000 USD Yearly USD 180000.00 240000.00 YEAR
Job Description & How to Apply Below

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity.

The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at

Astera Labs is seeking a Principal Product Applications Engineer to serve as the technical bridge between our customers and engineering organization.

In this highly customer-facing role, you will work directly with hyperscalers, AI infrastructure providers, and strategic OEM customers to support custom silicon programs from early architecture discussions through production deployment. You’ll partner with Product Management, Architecture, ASIC Design, Firmware, Validation, and Software Engineering to ensure customer requirements are translated into successful products while helping customers deploy next‑generation AI infrastructure.

This is not a traditional pre‑sales Field Applications Engineer role, nor is it an internal validation position. You will combine deep technical expertise with strong customer engagement, helping solve complex system‑level challenges while influencing future silicon development.

Responsibilities
  • Serve as the primary technical interface for strategic customer programs.
  • Develop trusted technical relationships with customer engineering teams and become a key advisor throughout the product lifecycle.
  • Support customer engagements from architecture discussions through silicon bring‑up, validation, production, and deployment.
  • Lead complex customer debug efforts involving hardware, firmware, software, and system‑level integration.
  • Translate customer requirements, deployment challenges, and architecture feedback into actionable engineering requirements.
  • Collaborate closely with Product Management, Architecture, ASIC Design, Firmware, Validation, and Software Engineering to drive customer success.
  • Influence future silicon products by providing customer insights and technical feedback to engineering teams.
  • Support customer design reviews, architecture discussions, technical training, and executive‑level technical engagements.
  • Develop technical collateral, application notes, reference designs, troubleshooting guides, and customer documentation.
  • Support technical escalations and drive issues to resolution across cross‑functional engineering teams.
  • Develop automation and diagnostic tools using Python or C/C++ to improve engineering efficiency and customer support.
  • Travel to customer sites as needed to support key design wins and strategic engagements.
Required Qualifications
  • BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
  • 10+ years of experience in Product Applications Engineering, Systems Engineering, Customer Engineering, Field Applications Engineering, or a related customer‑facing semiconductor role.
  • Experience supporting advanced semiconductor or custom silicon products from architecture through production.
  • Strong understanding of high‑speed interconnect technologies, including Ethernet (through 800G), PCIe, PAM4, Ser Des, DSPs, DAC, AEC, ACC, AOC, and related hardware technologies.
  • Experience with silicon bring‑up, post‑silicon validation, and system‑level debugging.
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