Senior ASIC Post-Silicon DFT Lead

Cisco’s Silicon One team seeks a senior ASIC post-silicon DFT Lead to shape post-silicon bring-up and production readiness. You’ll coordinate across post-silicon engineering, reliability, board and system groups to define DFT requirements early in design and drive quality through production.

You will influence next‑generation networking chips and advance DFT methodologies across the full development cycle, from design to ramp into high‑volume manufacturing.

We invite applications for the Senior ASIC Post-Silicon DFT Lead position located in San Jose, CA, United States.

Consider building your career as a Senior ASIC Post-Silicon DFT Lead at Cisco.

The Senior ASIC Post-Silicon DFT Lead position in the IT & Technology field is open for applications.

We have an opening for a Senior ASIC Post-Silicon DFT Lead in San Jose, CA, United States within IT & Technology.