Lead MTS Applications Engineer - Hybrid I2C/I3C & DDRValidation
Listed on 2026-10-17
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Engineering
Systems Engineer, Validation Engineer
Rambus, a premier chip and silicon IP provider, seeks a Lead MTSApplication Engineer to join the Memory Interface team in San Jose, CA. This full-time role involves validating DDR5 enablement devices and developing bench automation scripts, with emphasis on I2C/I3C protocols and post-silicon support.
The position offers a hybrid work model with on-site and remote days, and a compensation package including base salary, bonus, equity, and benefits.
This is a genuine role to take on the Lead MTS Applications Engineer
- Hybrid I2C/I3C & DDR5 Validation role at
The following role is for a Lead MTS Applications Engineer
- Hybrid I2C/I3C & DDR5 Validation with
Our group is growing, and we are hiring a Lead MTS Applications Engineer
- Hybrid I2C/I3C & DDR5 Validation in San Jose, CA, United States.
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