Senior -Speed DDR I/O & RX Analog Designer
Listed on 2026-10-18
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Engineering
Electronics Engineer, Systems Engineer, Hardware Engineer
Broadcom in San Jose seeks an experienced Hardware Engineer to design and optimize interface buffer chips for DDR families in FinFET nodes. You will contribute to DDR I/Os, chiplet interfaces, and RX/AFE design.
Responsibilities include circuit architecture exploration, high-speed DDR design, transmitter/receiver circuits, layout considerations, simulations, and reporting. Collaboration across chip teams and validation against performance targets.
We are looking to fill the Senior High-Speed DDR I/O & RX Analog Designer position at Broadcom in San Jose, CA, United States.
All applications are reviewed carefully by our team.
The position is based in San Jose, CA, United States.
This opportunity is part of our work in IT & Technology, Engineering.
The advertised compensation is 144..
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
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