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Principal ASIC Design Engineer Speed Interface Lead

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Anysilicon
Full Time position
Listed on 2026-10-19
Job specializations:
  • Engineering
    Electronics Engineer, Hardware Engineer, Test Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 180000 - 270000 USD Yearly USD 180000.00 270000.00 YEAR
Job Description & How to Apply Below
Position: Principal ASIC Design Engineer – High-Speed Interface Lead

Micron Technology seeks a Principal ASIC Design Engineer to lead digital design for high-speed interfaces, steering architecture through tape-out. You will own RTL/ System Verilog blocks, craft block specs, and coordinate with analog teams for optimal integration and timing targets.

The role demands strong System Verilog, RTL verification, and a track record of front-to-back tape-outs. Collaboration with layout and verification is essential in this highly interdisciplinary environment.

Join us at Anysilicon as our next Principal ASIC Design Engineer – High-Speed Interface Lead in San Jose, CA, United States.

Full responsibilities and requirements are described in the listing above.

Learn more about the Principal ASIC Design Engineer – High-Speed Interface Lead role in the description above.

We appreciate your interest in this position.

Join Anysilicon and contribute to our ongoing work.

Take a moment to read everything above and see whether this role is right for you.

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