ASIC DFT Verification Lead – Test Architect; Hybrid
Listed on 2026-10-19
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Engineering
Test Engineer, Systems Engineer, Hardware Engineer
Cisco Systems, Inc. in San Jose seeks a DFT Verification Lead to drive test planning and bench development for robust DFT architectures. You will work with Front-end RTL and backend PD teams to validate test logic across implementation and post-silicon flows, with mentorship-minimized problem-solving.
Join a Silicon One team that collaborates across design and verification, delivering high-quality silicon devices and scalable test strategies for new models and die configurations.
We have an opening for a ASIC DFT Verification Lead – Test Architect (Hybrid) in San Jose, CA, United States within IT & Technology.
The advertised compensation is 187..
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the ASIC DFT Verification Lead – Test Architect (Hybrid) role in the description above.
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