Principal ASIC Design Engineer — RTL & Silicon
Listed on 2026-10-20
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Engineering
Hardware Engineer, Electronics Engineer, Test Engineer, Systems Engineer
SiMa.ai, Inc. in San Jose, CA seeks a Principal ASIC Design Engineer to own complex blocks from microarchitecture to silicon. You will lead RTL implementation, verification support, and silicon bring-up in a fast-paced startup setting.
The role collaborates with verification, physical design, architecture, and firmware teams to achieve timing, power, and area targets, with emphasis on high-quality, synthesizable RTL and DFT readiness.
We invite applications for the Principal ASIC Design Engineer — RTL & Silicon Bring-Up position located in San Jose, CA, United States.
This posting is for the Principal ASIC Design Engineer — RTL & Silicon Bring-Up role , Inc., based in San Jose, CA, United States.
We are looking to fill the Principal ASIC Design Engineer — RTL & Silicon Bring-Up position , Inc. in San Jose, CA, United States.
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