Director - ASIC Engineering; Technical Planning and Engineering Execution

The application window is expected to close on: 10/22/2026

Meet the Team

The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly.

Join us to power the future of the digital world

Your Impact

In this strategic leadership role, you will serve as the operational backbone and Chief of Staff for the ASIC Physical Design (PD) & CAD engineering organization within the Silicon One Group, partnering directly with engineering heads, technical leads, and multi-functional executives to align operational execution, multi-million-dollar resource investments, foundry relations, and team culture.

You will provide operational governance, multi-functional bridge-building, and strategic leadership across three key pillars:

1. Strategic Operations & Governance

• Drive the operational cadence (weekly, monthly, and quarterly business reviews) for the ASIC PD CAD organization. Rigorously track program achievements, tape-out schedules, and silicon health metrics.
• Lead the annual and long-range headcount, operating budget, and EDA tool licensing planning cycles in close partnership with Finance and Procurement.
• Analyze and optimize resource allocation across concurrent chip tape-outs, advanced process nodes, and next-generation technology exploration teams.

2. Multi-functional Alignment & Communication

• Synthesize complex technical updates, timing closure bottlenecks, tape-out risks, and project statuses into clear, actionable presentations for executive leadership and board-level consumption.
• Serve as the primary point of contact and operational bridge between the ASIC engineering team and key internal partners, including Product Management, Supply Chain / Foundry Operations, Software/Firmware teams, and HR.
• Partner with engineering leads to manage operational relationships, delivery schedules, and landmark commitments with external IP vendors and leading commercial foundries (e.g., TSMC, Samsung, Intel Foundry Services).

3. Organizational Excellence & Culture

• Collaborate with engineering managers and HR on strategic hiring plans, technical skill-gap assessments, retention strategies, and workforce globalization initiatives.
• Design and implement internal communications, All-Hands meetings, and technical engineering summits to foster a transparent, high-performing, and collaborative engineering culture.
• Lead high-priority, ambiguous initiatives on behalf of the engineering head, such as evaluating geographic site expansions or exploring next-generation methodology adoptions (e.g., EDA tools).

Minimum Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical subject area or equivalent practical work experience.
• 14+ years of professional experience in the semiconductor industry with an understanding of the end-to-end ASIC/SoC development lifecycle (from architecture and RTL design to Physical Design, DFT, emulation, and Tape-out).
• Experience in one or more of these areas Technical Program Management (TPM), Engineering Management, Business Operations, or Chief of Staff role within a hardware or semiconductor engineering environment.
• Experience managing engineering operational budgets, headcount allocations, or EDA tool licensing portfolios.

Preferred Qualifications

• Master…