Principal​/Senior Principal Electrical Design Engineer

San Jose, California, United States

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity.

The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at  .

About the Role

We are seeking a Principal Electrical Design Engineer to define and drive the architecture, design, and technical strategy for advanced board-level hardware across next-generation networking and high-performance connectivity platforms. This role encompasses complex hardware systems including chassis boards, NIC cards, PCIe Gen6 platforms, and 800G Ethernet products.

This is a principal-level technical leadership role requiring deep domain expertise, strategic vision, and organizational influence. You will set the technical direction for board architecture, establish design methodologies, drive innovation in high-speed system design, and serve as the top technical authority across multiple programs. You will partner with and influence silicon, SI/PI, mechanical, firmware, manufacturing, system, and executive teams to deliver industry-leading products from concept through production and beyond.

• Define and own the board-level hardware architecture and technical roadmap across multiple product lines and platform generations
• Establish design standards, methodologies, and best practices that scale across the hardware engineering organization
• Drive architectural tradeoff decisions for complex multi-layer PCBs integrating high-speed digital, analog, and mixed-signal circuitry, balancing performance, cost, schedule, and manufacturability
• Get involved and drive discussions on stack-up strategy, impedance optimization and other SI relates development work
• Own power delivery architecture strategy including multi-rail regulation topologies, advanced sequencing schemes, transient response optimization, protection philosophies, and power budgeting across platform generations
• Define and evolve hardware implementation strategies for management and control interfaces such as I2C, SPI, GPIO, MDIO, and debug and observability architectures

• Own schematic capture and board-level design for complex multi-layer PCBs with high-speed digital, analog, and mixed-signal circuitry
• Serve as the technical authority for board-level hardware development across high-performance server and connectivity platforms, including NIC cards, PCIe add-in cards, and chassis-integrated hardware
• Provide technical oversight and approval for schematic capture and board-level designs across multiple designs
• Lead component strategy and qualification roadmaps in partnership with suppliers, sourcing, and manufacturing teams
• Drive design-for-excellence initiatives including DFT, DFM, and DFR to systematically improve manufacturability, yield, reliability, and production readiness across all programs

• Define and own the bring-up and validation strategy for new hardware platforms, establishing frameworks that improve first-pass success rates across the organization
• Lead…