Staff Engineer, -Speed I​/O Analog-Mixed Circuit

Position: Staff Engineer, High-Speed I/O Analog-Mixed Circuit
Please Note:

To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World’s Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future.

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.

Memory IO Lab is part of Samsung’s Memory Business Unit, the industry's all-time DRAM and NAND Flash leader both in technology as well as in volume. Memory IO’s vision is to provide memory interface technology solutions which can be adopted in DDR, LPDDR, GDDR, and more. We are an integral part of Samsung’s paramount R&D innovation engine. We work closely with cross-disciplinary development teams to bring feature innovation to product roadmaps.

Come and join the team that is providing the next generation IO tech solutions to support emerging machine learning applications, data analytics, and edge computing.

Location:

Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work policy

What You'll DoHands on in analog circuit design, which includes circuit design, running simulations to confirm functionality and performance, and work with verification team to verify design. The mixed-signal designs will include but are not limited to the following: high-speed data converters, PLL, and SERDES.Guide layout floor-planning block and top level to optimize the overall performance; supervise the layout activities and give concise guidelines to layout engineers, need to be hands on in drawing layout if necessary.

Ownership of circuit and system specifications.

Simulate designs with state-of-the-art CAD tools.

Document designs and simulation results.

What You BringBS 10+ years experience, MS 8+years of experience, PhD 5+ years experience in Electrical Engineering, Computer Science preferred. 5+ years of experience working with system on chip architecture, high-speed serial interfaces, and analog mixed-signal circuit design using advanced CMOS technology nodes.

Prior experience in design of any one of the standard high speed interfaces like DDR, LPDDR, , GDDR, HBM I/O interface.

Needs to be an expert in providing and understanding layout requirements of high speed circuits.

Knowledge of all facets of high speed I/O design but specifically should include DLL / PLL / FFE / CTLE / DFE, output drivers , ODT, Duty cycle correction (DCC), Training/calibration to improve timing, high speed power design and low power design.

Experience working closely with device/process team to define transistor specs

The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment.

Ability to troubleshoot and analyze complex problems.

Excellent communication (written and verbal) and interpersonal skills

Experience in high frequency clock distribution design, implementation, and analysis.

Deep understanding of PPA (performance, power, and area) trade-offs.

Ability to handle EDA tools well, such as Cadence, MATLAB (Simulink), and EM tools

Experience on silicon bring-up and automatic measurement using script

Strong scripting and automation skills using Tcl/Perl. Knowledge of Python is a plus.

Self-motivated problem-solver with an ability to work well in a team.

You’re inclusive, adapting your style…