Lead SoC Architect

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We are seeking an exceptional SoC Architect to lead the architecture definition and technical direction of our next‑generation SoCs deployed across a wide range of applications including AI, Data Center, Security, Communications, and Embedded Computing. This individual will define the overall SoC architecture, drive system‑level innovation, and deliver breakthrough architectures spanning heterogeneous compute, advanced memory systems, leading‑edge I/Os, high‑performance interconnects, and AI/Networking/Storage/Compute/Crypto acceleration.

As a senior technical leader, you will influence long‑term silicon architecture strategy, collaborate closely with internal/external partners, and guide teams across architecture, design, verification, physical implementation, software, and customer engineering. This role has broad organizational impact and is integral to shaping the future of AMD’s Adaptive, Embedded, and Custom SoCs.

You are a recognized industry expert in heterogeneous SoC architecture, with deep experience in CPUs, AI/Networking/Storage/Compute/Crypto acceleration, advanced protocols such as PCIe, UCIe, UAL and/or Ethernet, and high‑bandwidth memory/interconnect design. You have demonstrated leadership experience on complex technical programs, balancing performance, power, area, and cost tradeoffs. You communicate with authority and empathy, and thrive in fast‑paced, cross‑domain environments.

You bring a strong innovation mindset, a passion for leadership on complex and technically challenging programs, and a track record of delivering differentiated SoC solutions.

• Own and lead the architecture of next‑gen SoCs, spanning high performance multi-processor subsystems, coherent and non‑coherent interconnects, memory and cache hierarchies, advanced I/O, and AI, Networking, Storage, Compute and Crypto acceleration.
• Define long‑term SoC architectural strategy aligned with product, roadmap, and customer requirements.
• Develop clear, detailed SoC architecture specifications covering compute, memory, accelerators, on-chip and off-chip interconnect, RAS, security, boot/configuration, and SoC management subsystems.
• Guide cross‑functional execution, providing leadership across RTL design, verification, physical design, firmware, software, and platform teams.
• Collaborate deeply with leading-edge AI, Data Center, Security, Communications, and Embedded Computing customers, translating RFQs and use‑cases into robust SoC architectural requirements.
• Evaluate emerging processor IP, including next‑gen x86/ARM/RISC‑V cores, compute accelerators, and next generation PCIe, CXL, Ethernet, DDR, UCIe, and/or UAL protocols.
• Lead PPA trade‑off decisions, ensuring architectural choices align with product cost, performance, power targets, and manufacturability constraints.
• Innovate cross‑domain technologies such as hardware security, heterogeneous coherency, traffic shaping, system QoS, and power management.
• Mentor architects across the organization, elevating architectural rigor, methodology, and technical leadership capability.
• Create flexible and modular subsystem architectures that can be deployed in either chiplet, monolithic or 3D form factors.
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