SoC Architect
Job in
San Jose, Santa Clara County, California, 95173, USA
Listed on 2026-10-29
Listing for:
AMD
Full Time
position Listed on 2026-10-29
Job specializations:
-
Engineering
Systems Engineer, Hardware Engineer, Electronics Engineer
Job Description & How to Apply Below
AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.
THE ROLE We are seeking an experienced SoC Architect to lead the architecture of next-generation Adaptive SoCs. This role spans compute, memory, AI, high-speed I/O, power, clocking, and platform integration, with a strong focus on analog/mixed-signal technologies, advanced packaging, high-speed interface architectures, and system-level design. The architect will drive key silicon, package, and board-level decisions, with particular emphasis on I/O subsystem definition, PHY integration, signal and power integrity considerations, package-board co-design, and platform-level interface optimization to deliver scalable, high-performance, and power-efficient solutions.
THE PERSONYou are a seasoned SoC architect with deep expertise in heterogeneous compute systems and a strong understanding of end-to-end system design. You bring a system-level perspective that spans digital architecture, analog IP integration, packaging, signal integrity, power delivery, and platform design. You thrive in collaborative environments, excel at navigating complex tradeoffs, and are passionate about delivering innovative solutions that optimize performance, power, area, cost, and scalability.
You communicate effectively across engineering disciplines and influence architectural decisions through technical leadership and strategic vision.
KEY RESPONSIBILITIES Define and drive the architecture of key SoC subsystems, including processors, memory subsystems, interconnects, AI engines, GPUs, multimedia blocks, and I/O interfaces, with a focus on performance, power, area, and cost tradeoffs.
Lead SoC integration strategy, including control architecture, reset and boot flows, clocking architecture, power domains, security considerations, and system manageability.
Drive early-stage architectural exploration, workload analysis, performance modeling, and specification development.
Define and evaluate system-level solutions involving analog and mixed-signal IPs, including high-speed Ser Des, DDR PHYs, PCIe/CXL PHYs, clocking subsystems, power management circuits, and other I/O technologies.
Collaborate closely with analog, digital, package, and board design teams to ensure robust end-to-end interface architectures and successful platform deployment.
Drive architectural decisions related to signal integrity, power integrity, board-level constraints, interface protocols, and package-board interactions.
Contribute to architectural innovation for Adaptive SoC use cases across AI, data center, embedded, networking, graphics, and multimedia applications.
Partner with hardware, software, validation, product planning, and system teams to develop cohesive architecture solutions and execution plans.
Mentor engineers and contribute to the long-term technical direction of the architecture organization.
PREFERRED EXPERIENCEProven experience leading SoC architecture for complex processor-based systems with deep knowledge of processor, memory, interconnect, and I/O subsystems.
Strong understanding of analog and mixed-signal IP integration, including…
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