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Digital Design Engineer

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Infineon Technologies AG
Full Time position
Listed on 2026-11-01
Job specializations:
  • Engineering
    Electronics Engineer, Hardware Engineer, Test Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 133800 - 184000 USD Yearly USD 133800.00 184000.00 YEAR
Job Description & How to Apply Below

As a Staff Digital Design Engineer in our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life.

Key responsibilities
  • Execute hands‑on digital IP and SoC design, including micro‑architecture refinement , RTL implementation, design documentation, integration support, and release readiness
  • Develop high‑quality, synthesizable RTL in System Verilog /Verilog for reusable, configurable, integration‑ready IP blocks
  • Translate IP and SoC roadmap requirements into design plans, RTL deliverables, milestones, risks, and closure actions
  • Drive design quality closure through lint, CDC , RDC , synthesis, DFT checks, ATPG readiness, and related sign‑off activities
  • Debug and resolve design issues at block, integration, and system levels, working closely with Verification, Architecture, Physical Design, and System teams
  • Support development and integration of Automotive Base‑T1 Ethernet PHYs
  • Use automated, configurable, generator‑based RTL flows to improve reuse, scalability, consistency, and productivity
  • Contribute to IP architecture and design trade‑off discussions
Qualifications and skills
  • Bachelor's or Master's degree in Electrical, Electronics, or Computer Engineering, or a related field
  • 3+ years of hands‑on experience in semiconductor digital IP design and RTL development
  • Solid System Verilog/Verilog RTL coding skills and a strong grasp of digital design fundamentals (FSMs , clock domain crossing, timing)
  • Experience with micro‑architecture definition, design documentation, integration support, and RTL release execution
  • Working knowledge of front‑end design flows (lint, CDC, synthesis)
  • Experience with verification and debug activities, including analyzing simulation failures and working with verification teams
  • Understanding of the chip development process
  • Knowledge of Ethernet protocols or experience with networking IC development is preferred
  • Scripting experience (Python, Tcl, Perl) or exposure to generator‑based RTL flows
  • Familiarity with automotive standards (e.g., ISO 26262 functional safety)

Infineon Technologies is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), gender identity, national origin, ancestry, citizenship, age, physical or mental disability, legally protected medical condition, family care status, military or veteran status, marital status, domestic partner status, sexual orientation, or any other basis protected by local, state, or federal laws.

Employment at Infineon is contingent upon proof of your legal right to work in the United States under applicable law, verification of satisfactory references, successful completion of a background check and drug test, and signing all your on‑boarding documents.

In some instances, if applicable, U.S. export control laws require that Infineon obtain a U.S. government export license prior to releasing technologies to certain persons. This offer is contingent upon Infineon's ability to satisfy these export control laws as related to your employment and anticipated job activities. The decision whether or not to submit and/or pursue an export license to satisfy this contingency, if applicable, shall be at Infineon's sole discretion.

Infineon Technologies takes data privacy and identity theft very seriously. As such, we do not request personally‑identifiable information (PII) from applicants over the internet or electronically. Please kindly refrain from disclosing your PII electronically during the application process or to unauthorized websites that may…

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