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Senior Digital Design Engineer – RTL-to-Silicon Lead

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: InvenSense Inc.
Full Time position
Listed on 2026-11-02
Job specializations:
  • Engineering
    Electronics Engineer, Hardware Engineer, Systems Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 60000 - 75000 USD Yearly USD 60000.00 75000.00 YEAR
Job Description & How to Apply Below

Inven Sense Inc. in San Jose, CA, part of the TDK Group, seeks senior engineers to lead ASIC design across RTL to layout for MEMS sensor products. You will interface with Analog/MEMS teams to optimize sensor architectures and verify digital IPs through silicon bring-up.

The role requires 10+ years (or a PhD with 8+ years) of experience, strong Verilog/System Verilog, and MATLAB/Simulink proficiency, with FPGA prototyping familiarity. Collaborative, detail-oriented candidates thrive here.

The following role is for a Senior Digital Design Engineer – RTL-to-Silicon Lead with Inven Sense Inc.

We have an opening for a Senior Digital Design Engineer – RTL-to-Silicon Lead in San Jose, CA, United States within IT & Technology, Engineering.

This role, Senior Digital Design Engineer – RTL-to-Silicon Lead at Inven Sense Inc., could be your next opportunity.

Are you ready to take on the Senior Digital Design Engineer – RTL-to-Silicon Lead role at Inven Sense Inc.?

Position Requirements
10+ Years work experience
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