Senior IC Packaging Technologist: .5D/3D Chiplet Innovation
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2025-12-16
Listing for:
Astera Labs
Full Time
position Listed on 2025-12-16
Job specializations:
-
Manufacturing / Production
Engineering Design & Technologists, Packaging Engineer, Manufacturing Engineer
Job Description & How to Apply Below
A leading semiconductor company in San Jose seeks an experienced IC Packaging Technologist to lead the development of high-performance IC package solutions. The role involves strategic roadmap execution and collaboration with key suppliers. Candidates should have 10+ years of experience in IC packaging development and strong expertise in 2.5D/3D integration technologies. This position offers opportunities for innovation in a dynamic environment.
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Position Requirements
10+ Years
work experience
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