Video Codec Algorithm Modeler HW/ASIC Accelerators
Listed on 2026-10-16
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Software Development
AI Engineer (Applied/Software), Computer Science, Machine Learning/ ML Engineer
Byte Dance in the United States is seeking a video codec algorithm modeling engineer to design algorithms and C-models for hardware-accelerated encoding and processing.
You will work with a cross-functional team spanning algorithm, architecture, software, firmware, and hardware design to deliver scalable solutions for billions of users.
Applicants should have a BS degree in ECE/CS, strong knowledge of AVC/HEVC/AV1, and proven experience in C/C++ signal processing.
This opening is for the Video Codec Algorithm Modeler for HW/ASIC Accelerators role at Byte Dance.
Please review the full job details above before applying.
If your experience matches this role, we encourage you to apply.
All applications are reviewed carefully by our team.
The position is based in San Jose, CA, United States.
This opportunity is part of our work in IT & Technology, Engineering.
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