Lead Firmware Applications Engineer – CXL/DDR Memory
Listed on 2026-10-17
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Software Development
Embedded Systems/ Firmware/ IoT, Embedded Software Engineer
Astera Labs is seeking an experienced firmware engineer to lead customer engagements and drive firmware for Leo CXL Smart Memory Controllers. You will develop, validate, and debug C and Python firmware, contribute to DDR4/DDR5 interface work, and serve as the primary firmware contact for hyperscalers and OEM accounts.
You will collaborate with firmware, hardware, and product teams on releases, create technical docs, and present at reviews and forums.
We have an opening for a Lead Firmware Applications Engineer – CXL/DDR Memory in San Jose, CA, United States within Human Resources, IT & Technology.
For the Lead Firmware Applications Engineer – CXL/DDR Memory position at Astera Labs, we are reviewing applications now.
Step into the Lead Firmware Applications Engineer – CXL/DDR Memory role at Astera Labs in San Jose, CA, United States and grow with us.
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