ATE Test Engineer – EAG Laboratories

Company Description

Eurofins Scientific is a global leader in analytical testing, operating over 950 labs in 60 countries with 65,000 employees. EAG Laboratories, part of Eurofins, offers advanced services in analytical chemistry, microscopy, surface analysis, and engineering sciences—including failure analysis, product reliability, and ATE testing. We support clients across the product lifecycle, from R&D to manufacturing. Serving diverse industries, EAG delivers expert insights and tailored solutions.

Our engineers and scientists collaborate with clients to solve complex challenges and deliver actionable results. We foster a growth mindset, empowering individuals to drive success while meeting evolving technological and business needs.

EAG’s Engineering Sciences lab provides test, engineering, and reliability services to a broad spectrum of technology-based sectors. We are proud to support our clients who range from startup stages to Fortune 500 global industry leaders. Our engineering staff succeed within a challenging but inspiring world of innovation; helping to support our clients research, develop, understand, and refine technologies that shape consumer electronics, medical device, automotive, military, aerospace, and manufacturing industries, just to mention a few.

We demonstrate a hands‑on approach to technical expertise by utilizing leading‑edge methods and tools to attain insight that fuel engineering. If you enjoy being immersed in technology, dreaming about the future, tackling challenges head‑on, problem‑solving through teamwork, flexing your technical abilities and taking pride in accomplishments, then join us to live this every day.

We welcome mid‑level candidates to apply! If you have some knowledge working knowledge, we’d like to consider you! Local SF Bay Area candidates are encouraged to apply.

This role is subject to the International Traffic in Arms Regulations (ITAR) therefore all accepted applicants must be U.S. Persons as defined by ITAR: U.S. Person is a U.S. Citizen, U.S. Permanent Resident (i.e., Green Card Holder), Political Asylee, or Refugee.

• Lead cross‑functional test development initiatives, collaborating with design, product, and manufacturing teams to ensure robust test coverage and yield optimization.
• Mentor junior engineers and technicians, providing guidance on test strategy, debug techniques, and professional development.
• Drive continuous improvement in test methodologies, documentation standards, and team workflows.
• Represent the ATE team in technical reviews, program meetings, and customer interactions.
• Foster a culture of technical excellence, accountability, and innovation within the test engineering group.

• Strong academic and technical background in electrical engineering or related degrees. BS and master’s will be considered.
• Proven experience leading ATE test development projects from concept to production.
• Demonstrated ability to mentor and develop junior engineers, with a track record of building high‑performing teams.
• Strong interpersonal and communication skills, with the ability to influence cross‑functional stakeholders.
• Experience in strategic planning and resource management within an engineering environment.
• Ability to identify and implement process improvements that enhance team efficiency and product quality.
• 1+ years of experience releasing complex SoC/silicon products to high volume manufacturing.
• Working knowledge of high‑speed protocols like PCIe, Ethernet, Infiniband, DDR, NVMe, USB, etc.
• Hands‑on experience with high‑speed mixed‑signal SoC test program/hardware development on multiple high‑speed test platforms.
• Collaboration with design team to define test strategy, create and own test plan.
• Tester platform selection, design, and development of ATE hardware for wafer sort and final test.
• Familiar with high‑speed load board design techniques.
• Proven track record of implementing ATE patterns to optimize tester resources and minimize ATE test time while maintaining product quality.
• Strong knowledge and development of DFT techniques implemented in silicon that provide maximum defect and parametric…