IO Server Architect

Leaders in Silicon, Hardware/Software Engineering (Embedded & AI)

This critical role involves architecture through commercialization of the end-to-end Server IO solution including PCIe, CXL and UAL technologies.

Participate in new product development working with chip architects to understand architecture concept and high level IO requirements and chip solution.

Collaborate with IP design and performance teams to optimize for PPA trade-offs. Evangelize/communicate these to silicon, system and software stakeholders.

Leverage your extensive knowledge of CPU and SoC architecture for datacenter SoCs, including experience in microarchitecture and design of coherent IO subsystems. Expertise in the architecture of horizontal SoC technologies like coherency, power management, debug and RAS for IO subsystems and strong analytical, problem-solving, and communication skills are essential for excelling in this position.

MS or PhD in EE, CE or CS with 10+ years in developing IO architecture for high-speed IOs like PCIe Gen5-7, CXL
2.0-CXL
3.0.

Strong expertise in IOMMU / SMMU architecture and micro-architecture.

In-depth understanding of fully coherent and IO coherent protocol flows.

Detailed knowledge of multiprocessor system architecture, memory and IO subsystems, high-speed interconnects, operating systems/hypervisors, platform firmware.

Expertise in performance microarchitecture of IO datapath between host and devices.

Expertise in architecture and application of confidential compute technologies like TDISP, IDE and TSP for IO interfaces.

Experience in architecture and development of multi-socket links like UPI, C2C or Infinity fabrics.

End to end experience with the IO hardware stack from TL to PL.

Experience with ARM ISA and related specifications like SMMU, CHI, GIC, UAL and NVLink is a plus.

$/yr - $/yr

Mid-Senior level

Full-time

Semiconductor Manufacturing