Physical Design Engineer

We're looking for a hands-on Physical Design Engineer to support complex SoC projects for our client who designs and delivers advanced System-on-Chip solutions across AR/VR, imaging, networking, and storage technologies. They provide high-performance custom solutions for cutting-edge applications. You'll collaborate with customers, frontend, and integration teams to ensure successful tape-outs, contributing across all phases of physical design.

Key Responsibilities:

Pre-layout STA for feasibility and timing constraint validation
   Chip/block-level floor planning and pin assignment
   Clock spec review and clock tree synthesis
   Placement, routing, and timing optimization
   Sign-off tasks: RC extraction, STA, IR-drop analysis, and physical verification
   Customer meetings and technical presentations

Qualifications:

BSEE with 5+ years experience; MSEE preferred
   Strong experience in ASIC physical design and SoC development (28nm/16nm)
   Proficient in ICC2/Innovus, scripting (Perl/Tcl/Python)
   Knowledge of frontend design and hierarchical layouts
   Familiar with power/IR-drop tools (Prime Power/Redhawk) and STA (Prime Time)
   Skilled in PV tools and debugging PV errors
   Excellent communication and problem-solving skills