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Design Verification Engineer - Analog Mixed-Signal; AMS BCP

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: Texas Instruments
Full Time position
Listed on 2026-09-28
Job specializations:
  • Engineering
    Electronics Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 140000 - 170000 USD Yearly USD 140000.00 170000.00 YEAR
Job Description & How to Apply Below

Change the world. Love your job.

The Battery Charging Products group at Texas Instruments is looking for a candidate that is interested in working in a challenging, fast-paced environment. As a Design Verification Engineer-AMS you will get to directly interact with one of TI's high-volume and high-impact customers and will help architect new TI battery charger products and make our customers' visions a reality.

You will define, design, model, and document digital cores for battery management devices. We are looking for a self-motivated, highly driven AMS Verification Engineer to make an immediate impact on current developments, and help us grow market share in a competitive, constantly changing market.

TI offers an extraordinary culture, competitive benefits, professional development opportunities and collaboration coupled with a social responsibility. A career at TI provides the chance to work with some of the world's most dynamic technologies that help people learn, grow, connect and discover.

What will you be doing in this role?
  • Verification Strategy: Develop detailed coverage-driven Verification Plans by collaborating closely with System, Application, and Analog Design teams.
  • Modelling & Simulation: Create high-fidelity Analog behavioral models using Verilog-A, Verilog-AMS, Wreal (RNM), to enable efficient top-level simulation.
  • Environment Development: Build and enhance mixed signal test benches using a combination of schematic, models, and RTL.
  • Checkers & Assertions: Implement real-time analog checkers and post-processing checker strategies to ensure functional correctness.
  • Full-Cycle Verification: Execute RTL and Gate Level Simulations (GLS), running regressions and tracking functional coverage goals until tape-out.
  • Collaboration: Work with Digital DV Team, Analog Designers, and Post-Silicon Validation teams to debug complex issues and ensure successful product delivery.
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