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Speed Silicon Validation Engineer – DDR​/PCIe Gen

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: Pentangle Tech Services | P5 Group
Full Time position
Listed on 2026-10-11
Job specializations:
  • Engineering
    Test Engineer, Validation Engineer, Quality Engineering, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 120000 - 170000 USD Yearly USD 120000.00 170000.00 YEAR
Job Description & How to Apply Below
Position: High-Speed Silicon Validation Engineer – DDR5/PCIe Gen5

Pentangle Tech Services | P5 Group seeks hardware validation engineers with DDR5/PCIe Gen 5 experience for silicon bring-up and validation. Strong electrical background with Python scripting is a plus; candidate should understand SERDES, memory systems, and high-speed interfaces.

Responsibilities include debugging with design teams, validating IP on silicon and boards, performing tests, and contributing to test-plan improvements to ensure top-quality IP.

This is a strong role to take on the High-Speed Silicon Validation Engineer – DDR5/PCIe Gen5 role at Pentangle Tech Services | P5 Group.

As a High-Speed Silicon Validation Engineer – DDR5/PCIe Gen5, you will play an important part at Pentangle Tech Services | P5 Group in Santa Clara, CA, United States.

We invite applications for the High-Speed Silicon Validation Engineer – DDR5/PCIe Gen5 position located in Santa Clara, CA, United States.

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