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Lead Design Verification Engineer - Networking ASICs

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: Advanced Micro Devices
Full Time position
Listed on 2026-10-17
Job specializations:
  • Engineering
    Test Engineer, Hardware Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 140000 - 190000 USD Yearly USD 140000.00 190000.00 YEAR
Job Description & How to Apply Below

Advanced Micro Devices (AMD) seeks a high-impact Design Verification Engineer to verify high-performance ASICs in a fast-paced, collaborative environment. You will design robust UVM-based test benches for IP, subsystem, and SoC verification, owning test plans, coverage, and regression closure.

You will mentor junior engineers, drive cross-team verification tasks, and engage with RTL design, architecture, validation, firmware, and emulation teams to deliver high-quality silicon.

As a Lead Design Verification Engineer
- Networking ASICs, you will play an important part at Advanced Micro Devices in Santa Clara, CA, United States.

We are looking to fill the Lead Design Verification Engineer
- Networking ASICs position at Advanced Micro Devices in Santa Clara, CA, United States.

The Lead Design Verification Engineer
- Networking ASICs role at Advanced Micro Devices is now open for applications in Santa Clara, CA, United States.

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