Pre-Silicon Graphics Cache Verification Engineer
Listed on 2026-10-17
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Engineering
Test Engineer, Hardware Engineer
Apple Inc. in Santa Clara, CA, is seeking a Graphics Cache Hierarchy Design Verification Engineer to lead pre-silicon RTL verification of graphics memory subsystems.
The role involves designing verification plans, building test benches, and creating automated verification flows to ensure robust GPU design verification. The successful candidate will have a strong background in computer architecture, System Verilog, and verification methodologies, and will collaborate closely with design leads and
Step into the Pre-Silicon Graphics Cache Verification Engineer role at Apple Inc. in Santa Clara, CA, United States and grow with us.
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Pre-Silicon Graphics Cache Verification Engineer role in the description above.
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