SRAM Design and Layout Engineer
Listed on 2026-10-17
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Engineering
Automation & Mechatronics Engineer, Electronics Engineer, Test Engineer, Hardware Engineer
Qualcomm Technologies, Inc. in Santa Clara seeks an experienced CPU SRAM Design & Layout Engineer to own memory development from schematic to signoff.
You will design high-performance, power-efficient SRAMs and register files, create schematics, floor plans, and layouts, and collaborate with CAD and physical design teams to deliver manufacturable solutions. The role emphasizes memory architecture, layout verification (LVS/DRC), timing and power analysis, and contribution to DFT/automation.
We are seeking a motivated High-Performance SRAM Design and Layout Engineer to join Qualcomm in Santa Clara, CA, United States.
Join Qualcomm and contribute to our ongoing work.
Take a moment to read everything above and see whether this role is right for you.
This posting is for the High-Performance SRAM Design and Layout Engineer role at Qualcomm, based in Santa Clara, CA, United States.
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