VP, Analog Design

This executive leadership role drives the strategic vision, architecture, and execution of high-performance analog and mixed-signal integrated circuits (ICs) for timing and synchronization applications. Operating at the intersection of technical innovation and operational excellence, you will lead a world-class engineering organization from initial concept through silicon bring-up, characterization, and high-volume production.

You will oversee critical design domains including PLLs, precision oscillators, low-noise analog front ends, power management, and high-speed interfaces. By partnering cross-functionally with systems, RF, manufacturing, test, and product management, you will ensure the successful delivery of complex semiconductor products that meet rigorous performance, yield, and reliability standards.

• Define and drive the long-term analog and mixed-signal technology roadmap aligned with product strategy.
• Lead the architecture and development of high-performance analog and mixed-signal ICs, focusing on low-noise, ultra-low jitter, and phase noise optimization.
• Scale, mentor, and manage a high-performing global analog design organization, establishing rigorous engineering processes and design review standards.
• Collaborate cross-functionally with product management, validation, DFT, operations, and executive leadership to ensure execution excellence.
• Oversee silicon bring-up, characterization, qualification, and production ramp, ensuring projects meet performance, schedule, and cost objectives.

• 15+ years of experience in analog and mixed-signal IC design, including senior engineering leadership or executive-level roles.
• Proven track record of leading successful silicon product development programs from architecture through production.
• Deep technical expertise in analog and mixed-signal circuit design, semiconductor process technologies, signal integrity, and silicon validation.
• Experience building, scaling, and managing large engineering organizations and senior technical leaders.
• BS, MS, or PhD in Electrical Engineering or a related field.
• C2 English level or higher.
• Ability to work onsite in Santa Clara, CA.
• Hands-on experience with Analog IC Design, PLL, Power Management, ADC, DAC.

Analog IC Design Mixed-Signal IC Design PLL Silicon Validation Semiconductor Process Technologies Signal Integrity Circuit Design Power Management ADC DAC

RF MEMS Timing Circuits Clocking Automotive Semiconductors Foundry Management