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DFT Engineer
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-10-18
Listing for:
L&T Technology Services
Full Time
position Listed on 2026-10-18
Job specializations:
-
Engineering
Test Engineer, Electronics Engineer, Systems Engineer
Job Description & How to Apply Below
- 5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs
- Strong understanding of DFT fundamentals including cont rollability, observability, and scan-based testing
- Proven expertise in ATPG pattern generation, analysis, and debug
- Experience with MBIST, including memory test architectures and diagnostics
- Knowledge of IO Test methodologies for interface and pin level validation
- Solid understanding of clock DFT and clock verification concepts
- Strong grasp of digital design and RTL fundamentals
- Experience with industry standard DFT/ATPG EDA tools
- Ability to work effectively in fast paced, high performance semiconductor programs
- Strong analytical, problem solving, and communication skills
The expected salary range for this position is between $90K - $190K annually. The actual salary may vary based upon several factors including, but not limited to, relevant skills/experience, time in role, base salary of internal peers, prior performance, business line, and geographic/office location.
- Paid Leave
- Health Insurance
- Group life Insurance
- Disability
- 401(K)
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