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Senior DFT​/ATPG Engineer SoC​/ASIC Design

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: L&T Technology Services
Full Time position
Listed on 2026-10-20
Job specializations:
  • Engineering
    Hardware Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 90000 - 190000 USD Yearly USD 90000.00 190000.00 YEAR
Job Description & How to Apply Below
Position: Senior DFT/ATPG Engineer for SoC/ASIC Design

L&T Technology Services in California is seeking an experienced DFT/ATPG engineer to contribute to advanced SoC/ASIC verification. This role emphasizes hands-on pattern generation, analysis, and debug across complex semiconductor programs.

The ideal candidate has 5+ years in DFT/ATPG, strong knowledge of MBIST, IO validation, and clock DFT, with a solid background in RTL and digital design. Excellent problem-solving and communication skills are essential.

We are looking to fill the Senior DFT/ATPG Engineer for SoC/ASIC Design position at L&T Technology Services in Santa Clara, CA, United States.

This position is for the Senior DFT/ATPG Engineer for SoC/ASIC Design role at L&T Technology Services.

We are seeking a motivated Senior DFT/ATPG Engineer for SoC/ASIC Design to join L&T Technology Services in Santa Clara, CA, United States.

Consider building your career as a Senior DFT/ATPG Engineer for SoC/ASIC Design at L&T Technology Services.

Position Requirements
10+ Years work experience
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