Memory Validation Engineer: Automation & Calibration
Listed on 2026-10-20
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Engineering
Validation Engineer, Test Engineer, Automation & Mechatronics Engineer
Ambarella Inc. is hiring an engineer for our ASIC design team to own the data and automation layer of memory subsystems. You will develop training/calibration code, collect lab data, and build automation to speed up validation and debugging across LPDDR5/5X and LPDDR6 implementations.
You will work in the lab on silicon bring-up and also write automation to reduce manual debugging. Strong Python and C skills plus hardware debugging experience are essential.
This posting is for the Memory Validation Engineer:
Automation & Calibration role at Ambarella Inc, based in Santa Clara, CA, United States.
The position is based in Santa Clara, CA, United States.
This opportunity is part of our work in Engineering.
The advertised compensation is 152..
We aim to respond to suitable candidates as soon as possible.
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