Memory Subsystem HW Validation Engineer | Equity
Listed on 2026-10-21
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Engineering
Test Engineer, Validation Engineer
NVIDIA Corporation in Santa Clara, CA is seeking a hardware engineer to drive memory subsystem bringup and validation from first silicon power-on to production. You will plan DDR memory tuning, review specs, and debug issues across silicon, board, and firmware domains.
The role requires 2+ years of experience, a BS/MS in EE, strong signal integrity knowledge, and programming familiarity (C/C++/Python). You will collaborate across teams and work across time zones.
We have an opening for a Memory Subsystem HW Validation Engineer | Equity in Santa Clara, CA, United States within Engineering.
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Memory Subsystem HW Validation Engineer | Equity role in the description above.
We appreciate your interest in this position.
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