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EMIR Engineer

Job in Santa Clara, Santa Clara County, California, 95052, USA
Listing for: AMD
Full Time position
Listed on 2026-10-22
Job specializations:
  • Engineering
    Systems Engineer, Hardware Engineer
Job Description & How to Apply Below
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward.

Join us and, together, we’ll advance your career.

THE ROLE:

As senior EMIR CAD member, you will be responsible for Gatelevel EMIR, the development and maintenance of the world-class EMIR/Voltus flows.  You will collaborate with our internal experts and EDA vendors to evaluate new tool features and collect best practices and integrate them into a software designed flow for consistency, efficiency, and ease-of-use.  You will provide tools/flows support to the global IP & SoC and 3

DIC Stacked Die design teams and work with EDA vendors to resolve tool issues.

THE PERSON:

You have excellent communication and organizational skills, technically strong in EMIR/Voltus with knowledge in Physical Design and Advanced Packaging.  Exceptional at scripting skills in Perl, Tcl and Python.

KEY RESPONSIBILITIES:

Collaborate with EMIR CAD team to develop and maintain world-class EMIR flows using state-of-the-art EDA tools (Voltus, )Provide tools/flows support to the global IP/SoC/3

DIC design teams and enable the flow to support new tech nodes

Collaborate with internal EMIR experts & EDA vendors to drive continuous flow and methodologies improvements

Work with EDA vendors to resolve tool issues and bugs Manage tool versions regression and qualification for deployment

PREFERRED EXPERIENCE:

Extensive industrial experience in VLS/silicon design

Prior experience working with EDA vendors, particularly in Gatelevel EMIR domain (with Voltus/ experience)
Solid background in VLSI and CMOS fundamentals and electrical engineering knowledge

Strong analytic and problem-solving skills

Excellent communication skills ACADEMIC CREDENTAILS:  Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline.

Master's degree

LOCATION:

Santa Clara, CA#LI-SL3 This role is not eligible for visa sponsorship.

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.
We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.
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