Security Architect

Santa Clara, CASilicon – Architecture /Full-time /On-site

Role Overview Velaura is designing the compute silicon that will power the next generation of robots, autonomous systems, and intelligent machines operating in the physical world. As Security Architect for our Physical AI System-on-Chip (SoC), you will own the end-to-end security architecture of our silicon platforms—defining how our chips protect the AI models, sensor data, and safety-critical functions that Physical AI systems depend on.

This is a foundational, cross-cutting role. You will set the hardware security strategy from the earliest architecture phase through tape-out and production, working across the silicon, firmware, platform software, and product teams. Because Physical AI systems act on the world—moving, sensing, and making autonomous decisions—the security of our SoC is inseparable from its safety. You will help ensure that Velaura silicon can be trusted in the field, at scale, and over its full lifecycle.

Responsibilities Own the SoC security architecture: define the hardware root of trust, secure boot, key management, secure debug, and lifecycle/provisioning strategy across Velaura’s Physical AI silicon roadmap.

Architect protection for AI workloads and sensitive assets on-chip—model confidentiality and integrity, secure AI/NPU execution, memory isolation, trusted execution environments, and cryptographic acceleration.

Lead threat modeling and security risk assessments for the SoC and its subsystems, translating attacker capabilities (physical, side-channel, fault-injection, supply-chain) into concrete hardware and firmware requirements.

Partner with silicon design, firmware, safety, and platform software teams to embed security requirements into the RTL, boot flow, and SDK—and to review implementations against the architecture.

Define the approach to secure updates, attestation, and device identity so that fielded Physical AI systems remain trustworthy throughout their operational lifetime.

Establish security architecture standards, review processes, and design practices; mentor engineers and raise the security bar across the organization.

Guide alignment with relevant security and functional-safety standards and support certification, audit, and customer security-assurance efforts.

Required Qualifications
10+ years in security engineering or architecture, with significant experience defining hardware/SoC security for shipping silicon or embedded platforms.

Deep expertise in hardware security primitives: root of trust, secure boot, TEEs (e.g., Trust Zone or equivalent), key management, secure debug, and hardware/software cryptographic implementations.

Strong command of applied cryptography and of physical and side-channel attack classes (fault injection, power/EM analysis) and their countermeasures.

Hands-on experience with SoC development flows and the interfaces between RTL/silicon design, firmware, and low-level platform software; ability to specify and review security-relevant hardware and firmware.

Proven ability to lead threat modeling and to drive security requirements across multi-disciplinary teams from architecture through production.

Master’s  degree  in Electrical/Computer Engineering, Computer Science, or a related field, or equivalent practical experience.

Excellent written and verbal communication skills, with a track record of influencing technical direction and mentoring engineers.

Preferred Qualifications Experience securing AI/ML accelerators or NPUs, including protection of on-device models and inference pipelines.

Familiarity with robotics, autonomous systems, automotive, or other safety-critical domains, and with functional-safety standards (e.g., ISO 26262) alongside security standards (e.g.,…