CPU Processor Power Management Verification Engineer

Role Number:
Team:
Hardware

Location:

Santa Clara Posted:
Summary Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products.

The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want join us in these pursuits? Join us to help deliver the next groundbreaking Apple product!

In this highly visible role, you will be at the center of a chip design effort collaborating with many teams, with a critical impact on getting functional products to millions of customers quickly. We are looking for a strong candidate to join our processor verification team focusing on Power Management and Clock Control verification.

Description As a CPU Processor Power Management Verification Engineer, you will have the responsibilities as follows:
• Work closely with architecture and RTL designers on verifying the functionality correctness of the Power Management and Clock Control logic
• Develop and execute test plans and schedules for the power management and clock control logic
• Develop tests in Assembly, Scripts, System Verilog, or vectors according to test plans to drive testing in simulation and emulation environments
• Root cause failures and propose potential solution to the design team
• Work with silicon bringup team on developing tests that work in the emulation and FPGA environments. Aid silicon debug in related part of the design
• Develop coverage monitors and analyze coverage to ensure all the test cases in the test plans are covered
• Develop checkers or Verilog/System Verilog-base transactor to verify the design
• Write assertions and apply formal verification to the design

Minimum Qualifications Minimum BSAcademic experience in computer architecture

Academic experience in digital design using Verilog

Preferred Qualifications Master’s degree preferred

Knowledge of digital logic, micro-processor architecture and power management architecture

Proficiency in programming and scripting in Python, or Perl, or TCLExperience or academic knowledge in design verification methodology. Understanding of verification testplans, Verilog/System-Verilog test benches, transactors and checkers

Knowledge of system Verilog assertions or other advance verification techniques such as formal verification is a plus Should be an extraordinary teammate with excellent communication skills with the ability to articulate complex design issues during verification efforts

Be able to follow detailed work schedules and work independently on the verification efforts for a block/area of the design

Pay & Benefits At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $129,300 and $194,700, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including:
Comprehensive medical and dental coverage, retirement benefits, a range of…