Power & Performance Engineer - Platform Architecture
Job in
Santa Clara, Santa Clara County, California, 95052, USA
Listed on 2026-11-01
Listing for:
Apple
Full Time
position Listed on 2026-11-01
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer, Hardware Engineer
Job Description & How to Apply Below
Team:
Hardware
Location:
Santa Clara Posted:
Summary Are you highly detailed and skilled at developing creative solutions? Are you obsessed with understanding how things work, function and fit together at the component and system level? Do you love focusing on the smallest details and applying this knowledge to much larger product level decisions to inform roadmap? In this role you will work with a team to understand highly complex systems and their impact on Power, Performance, and SoC design/integration to inform future direction.
This work is a vital component of the quality and efficiency of Apple’s future products. Join this group, and you’ll have a direct impact on the technology that shapes Apple’s customer experiences. Together, our work will be the reason millions of customers feel they can trust their devices every single day and directly impact the success of future products.
Description Apple’s Platform Architecture group is looking for a motivated, curiosity driven Engineer looking to deprocess, image, and analyze silicon to extract critical intelligence on process technology, circuit design choices, memory architectures, and logic implementation efficiency - directly informing Apple's silicon roadmap and design.
Minimum Qualifications BS in EE, Materials Science, Physics, similar engineering degree or equivalent work experience.
Experience in semiconductor physical analysis including layer-by-layer deprocessing (chemical etch, mechanical polish, pFIB), SEM/TEM/FIB imaging, or EDS characterization of SoCs.
Preferred Qualifications MS, or PhD in EE, Materials Science, Physics, or similar engineering degree. .10 years industry experience.
Familiarity with silicon implementation and design including floorplan layout, standard cell libraries (HC/HD), Fin Flex configurations, fin counts, metal stack identification, and foundry/process technology differentiation
Ability to interpret and identify logic and memory library types from physical images — including SRAM bitcell characterization, cache hierarchy estimation, and quantitative logic utilization/silicon efficiency analysis.
Experience coordinating with failure analysis labs and external vendors to plan and execute deprocessing campaigns, from chip extraction through final transistor-level imaging.
Ability to produce clear reports and present findings to cross-functional silicon design teams
Passion for the semiconductor and consumer electronics industry, with a desire to stay current via conferences (IEDM, ISSCC, VLSI Symposium) and industry publications. Curiosity for what's new and a passion for uncovering the unknown are a must.
Basic image analysis, measurement, and scripting experience (Python, shell) for quantitative area and density estimation.
Pay & Benefits At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $184,700 and $324,800, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including:
Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition.…
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