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ASIC Design Engineer – Fabric​/Interconnect

Job in Santa Clara, Santa Clara County, California, 95052, USA
Listing for: Apple
Full Time position
Listed on 2026-11-01
Job specializations:
  • Engineering
    Electronics Engineer, Systems Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 184700 - 324800 USD Yearly USD 184700.00 324800.00 YEAR
Job Description & How to Apply Below
Role Number:
Team:
Hardware

Location:

Austin;
Santa Clara Posted:
Summary At Apple, phenomenal ideas have a way of becoming great products and customer experiences very quickly. The industry is accustomed to Apple taping out the SOC’s for our various products at a rigorous pace. In order to achieve this, Apple’s best-in-class chip is driven by top notch design engineers who implement various blocks of the chip and deliver high quality components to SoC.

This is a high transparency and critically important role and requires close working relationships with many groups and an organized approach to coordinate all tasks in parallel to hit schedules consistently with a quality design. Our position requires knowledge of interconnect fabrics and system memory hierarchy Description
- Design & Integration of coherent and non-coherent fabrics into a subsystem or SoC with good understanding of on-chip interconnect architectures (NoC topologies, crossbars, arbitration).

- Own all aspects of RTL development design, templating, scripting and RTL generation.

- Work and collaborate with other designers in the group to deliver results.

- Integrate common/shared IP blocks to design and optimize memories/hard macros required for the block
- Work with front-end synthesis/STA teams to ensure timing for the block is met
- Work with power/performance and functional verification team to ensure high quality of the block
- Work with multi-disciplinary groups to make sure designs are delivered on time and with the highest quality by incorporating proper checks at every stage of the design process

Minimum Qualifications Minimum of BS + 10 years relevant industry experience.

Preferred Qualifications Knowledge of cache coherency protocols (MESI, MOESI, directory-based coherence) and memory hierarchy.

A consistent track record of delivering large, sophisticated designs in high volume production for low power applications

Solid working experience with synthesis, power, performance and verification teams to develop and deliver high quality RTL design on time Strong interpersonal skills, as the candidate will work with diverse groups within the company

Self-starter, highly motivated, highly organized, and schedule driven

Familiarity with all front-end tools including lint, CDC, synthesis

Pay & Benefits At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $184,700 and $324,800, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including:
Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits

Note:

Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

EEO Statement Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex,…
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