Senior PMIC Design Engineer Power Management ICs
Listed on 2026-11-04
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Engineering
Systems Engineer, Electronics Engineer, Electrical Engineering, Hardware Engineer
Qualcomm Technologies, Inc. is seeking a senior PMIC design engineer in Santa Clara, CA to lead architecture, design, verification, and documentation of mixed-signal PMIC blocks for compute, data center, automotive, and industrial applications.
You will work with Cadence, SPICE, MATLAB and Verilog/VHDL, guide layout, drive silicon bring-up, characterization, and qualification, and mentor peers while aligning with product and validation teams.
The Senior PMIC Design Engineer for Power Management ICs role at QUALCOMM, Inc. is now open for applications in Santa Clara, CA, United States.
We are currently recruiting a Senior PMIC Design Engineer for Power Management ICs for our team in Santa Clara, CA, United States.
This is an excellent role to take on the Senior PMIC Design Engineer for Power Management ICs role at QUALCOMM, Inc.
As a Senior PMIC Design Engineer for Power Management ICs, you will play an important part at QUALCOMM, Inc. in Santa Clara, CA, United States.
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