Power Modeling Engineer – CPU/IP RISC-V
Listed on 2026-11-04
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Engineering
Systems Engineer, Electrical Engineering, Engineering Design & Technologists, Electronics Engineer
SiFive is seeking a researcher to develop power models for RISC-V based CPUs. You will correlate power estimates with RTL and silicon while exploring architecture options to optimize performance and power.
The role blends hardware and software engineering, requiring strong problem-solving and a fast learner. You will work on models that help predict the impact of design changes, with opportunities for equity and competitive benefits.
Consider building your career as a Power Modeling Engineer – CPU/IP for RISC-V at SiFive, Inc.
The Power Modeling Engineer – CPU/IP for RISC-V position in the Engineering field is open for applications.
We have an opening for a Power Modeling Engineer – CPU/IP for RISC-V in Santa Clara, CA, United States within Engineering.
This role, Power Modeling Engineer – CPU/IP for RISC-V at SiFive, Inc., could be your next opportunity.
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