Speed Silicon Validation Engineer – DDR/PCIe Gen
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Engineering
Job Description & How to Apply Below
Pentangle Tech Services | P5 Group seeks hardware validation engineers with DDR5/PCIe Gen 5 experience for silicon bring-up and validation. Strong electrical background with Python scripting is a plus; candidate should understand SERDES, memory systems, and high-speed interfaces.
Responsibilities include debugging with design teams, validating IP on silicon and boards, performing tests, and contributing to test-plan improvements to ensure top-quality IP.
The High-Speed Silicon Validation Engineer – DDR5/PCIe Gen5 role at Pentangle Tech Services | P5 Group is now open for applications in Santa Clara, CA, United States.
Are you ready to take on the High-Speed Silicon Validation Engineer – DDR5/PCIe Gen5 role at Pentangle Tech Services | P5 Group?
We would love to welcome a new High-Speed Silicon Validation Engineer – DDR5/PCIe Gen5 to our team in Santa Clara, CA, United States.
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