Hardware Design Test Intern — DFT, Debug & STA

NVIDIA is seeking students for a 12-week full-time Hardware Design for Test (DFT) internship. As part of our AI and accelerated computing teams, you will work on projects with measurable impact and gain hands-on experience in a leading hardware environment.

You must be enrolled in an MS or PhD program in Electrical or Computer Engineering, with coursework in DFT, Digital Design, STA, and related areas. The internship offers hourly pay based on location and experience, and intern benefits.

As a Hardware Design for Test Intern — DFT, Debug & STA, you will play an important part at NVIDIA Corporation in Santa Clara, CA, United States.

Consider building your career as a Hardware Design for Test Intern — DFT, Debug & STA at NVIDIA Corporation.

The Hardware Design for Test Intern — DFT, Debug & STA position in the Engineering, Other field is open for applications.