RISC‑V CPU Verification Engineer — Lead Verification & Validation

A leading technology company in Santa Clara, California is seeking a Design Verification Engineer to validate CPU and SOC micro-architectures. The ideal candidate will develop detailed test plans and verification methodologies, ensuring the designs meet launch readiness standards. Applicants should have extensive knowledge of RISC-V architecture and experience leading verification teams. This position offers competitive compensation in addition to an annual discretionary bonus and RSU grants as part of a comprehensive benefits package.
Our organisation is growing, and we are hiring a RISC‑V CPU Verification Engineer — Lead Verification & Validation in Santa Clara, CA, United States. If your experience matches this role, we encourage you to apply. All applications are reviewed carefully by our team. The position is based in Santa Clara, CA, United States. This opportunity is part of our work in Engineering.