Senior IC Substrate Speed Layout Engineer
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Engineering
Job Description & How to Apply Below
NVIDIA Corporation is seeking a Senior Package Layout Engineer in Santa Clara, CA, to design intricate IC substrate layouts for graphics products. You will collaborate with design teams to optimize size, cost, and performance across high-speed substrates.
You will work with Cadence APD/SiP tools, develop CAD libraries, and drive layout decisions to meet stringent engineering goals in a hybrid work environment.
This posting is for the Senior IC Substrate & High-Speed Layout Engineer role at NVIDIA Corporation, based in Santa Clara, CA, United States.
The position is based in Santa Clara, CA, United States.
This opportunity is part of our work in Engineering.
The advertised compensation is 136..
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Position Requirements
10+ Years work experience(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
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