CPU Timing Closure Engineer Oryon Cores

Qualcomm Technologies, Inc. seeks a CPU Physical Design Timing Engineer to define, develop and drive timing closure for Oryon CPU Cores. You will work with RTL and timing teams to meet aggressive power, area and performance goals on advanced nodes.

You will build automation scripts (TCL/Perl/Python), run Prime Time/Tempus, and contribute to timing methodology across multiple CPU projects, driving PPA improvements. Strong STA experience and RTL-to-GDS flow knowledge are essential.

We are seeking a motivated CPU Timing Closure Engineer for Oryon Cores to join Qualcomm in Santa Clara, CA, United States.

Consider building your career as a CPU Timing Closure Engineer for Oryon Cores at Qualcomm.

The CPU Timing Closure Engineer for Oryon Cores position in the Engineering field is open for applications.

We have an opening for a CPU Timing Closure Engineer for Oryon Cores in Santa Clara, CA, United States within Engineering.