Principal CAD Engineer

Ampere is a semiconductor design company for a new era, leading the future of computing by developing SoCs and platform solutions focused on high-performance, energy efficient AI compute. As a pioneer in the new frontier of energy efficient high-performance computing, Ampere is part of the Softbank Group of companies driving sustainable AI compute for cloud, edge, and physical applications.

AI is showing up in essentially every part of the technology landscape, and we’re focused on delivering the performance, efficiency, and reliability those workloads require. Ampere is building compute silicon and platforms for AI applications spanning a broad range of industries. We focus on solving exciting challenges in areas such as robotics and automotive, among others, but the core of our work is enabling efficient AI at scale and across multiple application domains.

We are looking for an experienced Principal CAD Engineer to join a small but growing Processor Design group, advancing the art of high-performance implementation and physical design. Ideal candidates will develop and maintain physical design flows for high performance designs and contribute to PPA related methodology changes across multiple projects and technology nodes.

• Drive development and continuous improvement of synthesis and physical design methodology with a focus on maximizing Power, Performance and Area (PPA)
• Collaborate closely with implementation and physical design teams to optimize PPA metrics across multiple projects
• Analyze the impact of technology and design changes on PPA at block and full chip level
• Identify PPA bottlenecks and develop solutions that balance timing, area, power and routability
• Debug flow issues and implement robust automation for scalable deployment across various advanced technologies and design teams

Proven experience driving PPA optimization across physical design flows – from synthesis to sign-off at advanced technology nodes

Success in delivering block or chip-level designs with aggressive PPA targets

Experience in low power design and implementation techniques using UPF/CPF

Proficiency in hierarchical P&R, floor planning, pin-assignment, clock-distribution, critical-signal handling, hierarchical abstractions (black-box, ILM, etc.)

Expertise in developing scalable CAD infrastructure and automation frameworks for PPA regressions

Familiar with chip-finishing and sign-off processes including metal-fill, spare-cells, DFM, boundary-cell insertion, etc

Experience with EDA tools such as Cadence Genus, Innovus, Mentor Calibre, etc

Excellent communication, analytical and debugging skills

Electrical or Computer Engineering - Bachelor’s degree & 8 years of related experience; or Master's degree & 6 years; or PhD & 3 years

At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, cash long-term incentive, and comprehensive benefits. The full base pay range for this role is between $195,000 and $292,000.

Our benefits include health, wellness, and financial programs that support employees through every stage of life.

• Premium medical insurance, dental insurance, vision insurance, as well as income protection and a 401K retirement plan, so that you can feel secure in your health and financial future.
• Unlimited Flextime and 10+ paid holidays so that you can embrace a healthy work-life balance.
• A variety of healthy snacks, energizing espresso, and refreshing drinks to keep you fueled and focused throughout the day.

And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are excited to share more about…