Senior Platform Networking Software Engineer, Systems Engineering

THE ROLE

Join the Systems Software team to architect and deliver the core software powering the industry’s most innovative, high‑availability storage platforms. You will lead the development of mission‑critical system components, transforming complex hardware‑software integration challenges into seamless, zero‑downtime customer experiences. By collaborating with hardware and cross‑functional software teams, you will define the future of enterprise data storage and ensure our platforms remain at the cutting edge of performance and reliability.

• Architect High‑Performance Networking: Drive the end‑to‑end design and debugging of C/C++ networking software to ensure next‑generation switching and fabric platforms meet rigorous scalability and resiliency benchmarks.
• Own Core Protocol Development: Deliver critical Layer 2 and Layer 3 features—including forwarding behavior and control‑plane protocols—that simplify operations for global enterprise customers.
• Lead Hardware‑Software Integration: Partner with ASIC vendors and internal platform teams to implement switch SDK functionalities, ensuring robust hardware interfaces and successful in‑service software upgrades (ISSU).
• Innovate with Open Networking: Design and customize SONiC‑based solutions across the control and data planes to enhance our disaggregated network operating system capabilities.
• Drive Technical Excellence: Act as a technical mentor and lead for complex initiatives, setting the standard for code quality and architectural decisions across cross‑functional networking efforts.
• We are primarily an in‑office environment and therefore, you will be expected to work from the Santa Clara, CA office in compliance with company policies, unless you are on PTO, or work travel, or other approved leave.

• Systems Programming Expertise: Advanced proficiency in C/C++ (C++11+) with a track record of building and debugging performance‑sensitive systems software or networking applications.
• Deep Networking Domain Knowledge: Mastery of Layer 2 and Layer 3 protocols (Ethernet, VLANs, BGP, ECMP) and the ability to translate these complex behaviors into production‑ready code.
• Hardware Interfacing
  
  Skills:
  
  Practical experience working with switch SDKs or Linux networking internals (kernel concepts, drivers, or packet processing) to interact directly with ASIC capabilities.
• Availability‑Focused Engineering: Understanding of non‑disruptive upgrade (NDU) technologies and the architectural discipline required to build systems that minimize customer impact during maintenance.
• Collaborative Technical Leadership: Ability to independently drive complex problem‑solving and influence technical direction across multiple teams while mentoring junior engineers.

Salary ranges are determined based on role, level and location. For positions open to candidates in multiple geographical locations, the base salary range is reflective of the labor market across the applicable locations.

This role may be eligible for incentive pay and/or equity.

There is no Final date to receive applications and we accept applications on an ongoing basis until the job is filled.

The annual base salary range is: $175,000 — $263,000 USD

• Pure Innovation
  :
  We celebrate those who think critically, like a challenge and aspire to be trailblazers.
• Pure Growth
  :
  We give you the space and support to grow along with us and to contribute to something meaningful. We have been named Fortune’s Best Large Workplaces in the Bay Area, Fortune’s Best Workplaces for Millennia ls and certified as a Great Place to Work!
• Pure Team
  :
  We build each other up and set aside ego for the greater good.

And because we understand the value of bringing your full and best self to work, we offer a variety of perks to manage a healthy balance, including flexible time off, wellness resources and company‑sponsored team events. Check out  for more information.

Candidates with disabilities may request accommodations for all aspects of our hiring process. For more on this, contact us at TA‑ if you’re invited to an interview.

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