Senior DV Engineer – Space ASICs
Listed on 2026-11-04
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Engineering
Systems Engineer, Aerospace / Aviation / Avionics, Electronics Engineer, Test Engineer
E-Space, based in Saratoga, CA, is seeking Digital Design Verification Engineers to verify our custom ASICs for satellite and wireless telephony. The role requires Verilog, System Verilog and UVM expertise, with VHDL knowledge a plus. This is a full-time exempt position in our Saratoga office.
The base pay target is $120,000 to $220,000 annually, with total compensation determined by experience and skills. Sponsorship is not available for this location at this time.
The following role is for a Senior DV Engineer – Space ASICs with E-Space.
As a Senior DV Engineer – Space ASICs, you will play an important part at E-Space in Saratoga, CA, United States.
We invite applications for the Senior DV Engineer – Space ASICs position located in Saratoga, CA, United States.
The following opportunity is for a Senior DV Engineer – Space ASICs with E-Space.
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